10:00 -- 12:55 WB1: Reliability
Chairperson: S-L. Fu (I-Shou University)
Y. Fukuoka (Toshiba Corporation)
- Reliability of 2nd Level Joining in Several CSP packages
Y. Orii
IBM Japan, Ltd. / Japan
- Analysis of Optimal Structure by FEM for CSP Mounting on Build-up PWB
T. Nakanishi, T. Nishio, K. Ohsumi
IBM Japan, Ltd. / Japan
- A Study on Reliability Modeling for Through Hole Cracking Failure in Thermal Enhanced PBGA Laminate
T. Kobayashi
IBM Japan, Ltd. / Japan
- Chip Scale Package Solder Joint Reliability Modeling
M. Amagai
Texas Instruments, Japan / Japan
- The Effect of Polyimide Surface Chemistry and Morphology on Critical Stress Intensity Factors
M. Amagai
Texas Instruments, Japan / Japan
- Mechanical Fatigue Test Method for Chip/Underfill Delamination in Flip-Chip Packages
K. Hirohata
Toshiba Corporation / Japan
- Membrane Probe with Pyramidal Tips for Testing a Logic LSI
S. Kasukabe, T. Mori, T. Watanabe, A. Ariga, Y. Motoyama, M. Sugimoto*, Y. Inoue*
Hitachi, Ltd., *Nitto Denko Corporation / Japan
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