Advanced Program

April 19 (Wed.)

Room A

9:50 -- 10:00  Opening Ceremony

10:00 -- 13:20  WA1: Advanced Packaging Technology

Chairperson: R. Tummala (Georgia Institute of Technology)
                 H. Nishida (IBM Japan, Ltd.)

  1. CSP + HDI = MCM !
       C. E. Bauer
       TechLead Corporation / U.S.A.
  2. Development and Board Level Reliability of a Waferlevel CSP
       J. Simon
       Fhg-IZM / Germany
  3. Humid Aging Performance Testing of Ceramic, Thermo Plastic And Transfer Molded Vision Packages
       R. J. Ross
       RJR Polymers, Inc. / U.S.A.
  4. ATM-switch MCM using 600Mbps×64 HW Single-ended Dynamic Reference I/O
       K. Yamakoshi
       NTT Corporation / Japan
  5. Suppression Method of Parasitic PPL Mode of CB-CPW for MIMIC
       H. S. Yoon
       Ajou University / Korea
  6. High Wetprooting Plastic Package
       E. Togashi
       Mitsui Chemicals Inc. / Japan
  7. Build-up Board Process with CycloteneTM Polymer Coated Cu Foil
       K. Ohba, H. Akimoto, M. Kohno, Y-H. So*, J. IM*, P. Garrou*, T. Simoto**, K. Matsui**, Y. Shimada**
       Dow Chemical Japan, *Dow Chemical U.S.A. / U.S.A, **NEC Coeporation / Japan
  8. Three-Dimensions Packaging
       K. Hatada
       Atomnics Laboratory Inc. / Japan
13:20 -- 14:00  Lunch Time

14:00 -- 16:45  Invited Speeches

Chairperson: S. Nishi (Konica Corporation)

  1. The IMAPS Strategic Plan, 2000-2002
       Dr. Paul Van Loan
       President of IMAPS / USA
  2. Packaging Trends for Microelectronics in Europe
       Dr. Elke Zakel
       Packaging Technologies GmbH / Germany
  3. Wafer Level Packaging Technology in Japan
       Dr. Sei-ichi Denda
       Nagano Instutute of Tehnology / Japan
  4. Future Trend in Environmentary Preferred Materials for Electronic Packaging
       Dr. Robert C. Pfahl
       Motorola Advanced Technology Center / USA
16:45 -- 17:00  Awarding Ceremony

Room B

10:00 -- 12:55  WB1: Reliability

Chairperson: S-L. Fu (I-Shou University)
                  Y. Fukuoka (Toshiba Corporation)

  1. Reliability of 2nd Level Joining in Several CSP packages
       Y. Orii
       IBM Japan, Ltd. / Japan
  2. Analysis of Optimal Structure by FEM for CSP Mounting on Build-up PWB
       T. Nakanishi, T. Nishio, K. Ohsumi
       IBM Japan, Ltd. / Japan
  3. A Study on Reliability Modeling for Through Hole Cracking Failure in Thermal Enhanced PBGA Laminate
       T. Kobayashi
       IBM Japan, Ltd. / Japan
  4. Chip Scale Package Solder Joint Reliability Modeling
       M. Amagai
       Texas Instruments, Japan / Japan
  5. The Effect of Polyimide Surface Chemistry and Morphology on Critical Stress Intensity Factors
       M. Amagai
       Texas Instruments, Japan / Japan
  6. Mechanical Fatigue Test Method for Chip/Underfill Delamination in Flip-Chip Packages
       K. Hirohata
       Toshiba Corporation / Japan
  7. Membrane Probe with Pyramidal Tips for Testing a Logic LSI
       S. Kasukabe, T. Mori, T. Watanabe, A. Ariga, Y. Motoyama, M. Sugimoto*, Y. Inoue*
       Hitachi, Ltd., *Nitto Denko Corporation / Japan

17:20 -- 19:30  Evening Party (Palace Hotel)