Sessions and Keywords:
1. Advanced Packaging
Area Array Packages, SiP, PoP, PiP, Wafer Level Packaging, System Integration, LCD Modules, MCM, System on Package
2. Substrate
Laminates, Interposers, Fine Pitch, Build-up Substrates, Flexible Printed Circuits, Embedded, Conductive Paste, Thin Core, Coreless, Low CTE, Thin Film Wiring
3. Design, Modeling, and Reliability
Signal Integrity, Power Integrity, High Speed Board Design, Reliability, Failure Analysis, Testing, Evaluation, EDA
4. Thermal Management
Advanced Cooling Modules, Fans and Blowers, Heat Pipes, Heat Sinks, Micro and Nano Scale Heat Transfer, Optical Devices, Power Devices, Thermal Interface Materials, Thermal Measurements, Thermoelectrics
5. Manufacturing and Process
Flip Chip, Plating, Inkjet, Process Control, Equipment, Thin Films, Underfills, Encapsulation, Molding, Fluxes
6. Interconnection
Flip Chip, Wire Bonding, Soldering, Bump Formation, Chip Package Interaction, Low k, NCF/NCP, ACF/ACP, Leadframe, Surface Finishes, BGA, Fluxless Joining
7. Optoelectronics
Photonic Devices, Optical Fibers, Waveguides, Optical Interconnects, Transceivers, Connectors, LD/PD, LED, OE/EO, TOSA/ROSA, WDM, Optical Wiring Boards
8. Printed Electronics
Inkjet, Screen Printing, Conductive Wiring, Insulation, Printed Organic TFT, Device Applications
9. 3D and TSV
Silicon Stacking, Chip on Chip, Chip on Wafer, Wafer on Wafer, TSV, Via Formation and Filling, Wafer Thinning, Wireless Interconnection, 3D LSI Design and CAD System
10. MEMS/Sensor
MEMS/Sensor Devices, Process, Assembly and Packaging, System Integration, MOEMS
11. Self-organization/Self-assembly
Nano Materials/Devices, Self-organization/Self-assembly, Dissipative Structures, Hierarchical Structures, Bottom-up Manufacturing Bio-mimetic, Nature-oriented Processes/Design/Applications
12. Emerging Technologies
Nano Technology, Nano Imprint, Organic Semiconductors
13. RF
RFID, High Frequency Devices, Packaging, Filters, EMI, EMC, Antennas
14. Automotive Electronics
Power Devices, Power Electronics, ECU, Sensors, Lead Free Solder, Wire Harness
15. Energy and Environment
PV, Lead Free, Fuel Cells, Power Electronics, Power Devices, Energy Efficient Package Design
16. Metrology
Current Density, Power Map, Thermal Map
17. Others
Market Trends, Environmentally Conscious Product and Processes, Cost Analysis

Abstract Deadline and Paper Submission :
Authors must submit a 300-word abstract in PDF or MS Word format through the JIEP web site by November 15 29, 2011.
It is recommended to attach one piece of figure, picture or table.
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Notification of acceptance by the beginning of December, 2011. Final manuscript to be submitted by February 13, 2012.
Best Paper Awards :
The JIEP will present the Best Paper Awards to selected outstanding papers.
Young Awards :
The IEEE CPMT Society Japan Chapter will present the Young Awards to young parson under 35 years old. 
Organizing Committee : 
General Chair: Yasumitsu Orii (IBM Japan)
Vice General Chair: Yasuhiro Ando (Fujikura), Yoshio Nogami (Toray Engineering), Shintaro Yamamichi (Renesas Electronics)

Technical Program Committee :
Chair: Shintaro Yamamichi (Renesas Electronics)
Co-Chairs: Masahiro Inoue (Osaka University), Hitoshi Sakamoto (NEC), Shoji Uegaki (ASE Marketing & Service Japan), Hiroshi Yamada (Toshiba)

 

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