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April 18 (Fri.)
 

Room A

Room B

8:30

FA1: 3D Packaging

  1. Wafer Level Packaging for RF MEMS Device
    T.Masai, Omron / Japan
     
  2. High-density Through-hole Interconnections in a Silicon Substrate
    H.Nakamura, H. Wada, K.Itoi, S.Yamamoto, T.Suematsu, T. Takizawa, Fujikura / Japan
     
  3. Development of Die Level Stacked Packaging
    I. Miyazawa, K. Matsui, K.Hara, Y. Matsuo, M. Ishii, Y. Yokoyama, Seiko Epson / Japan
     
  4. Superfine Pitch Ultrasonic Bonding Technology on 3D Stacked LSI
    Y.Akiyama, R.Kajiwara, N.Tanaka, K.Tanida, M.Umemoto, Y.Tomita, M.Tago, K. Takahashi, Association of Super-Advanced Electronics Technologies / Japan
     
  5. New Folded and Stacked 3D Multiple Die Packaging
    V. Solberg, Tessera Technologies / U.S.A.

FB1: Pb-free Solder

  1. Development of the Sn-Zn-Al Solder Alloys
    M.Kitajima, Fujitsu / Japan
     
  2. Solderability and Interface Property of Sn-Zn-Bi on Metal Substrates
    Y-S.Kim, C-W.Whang, K.Suganuma, Osaka University / Japan
     
  3. Lead Free Solders with High Mechanical Reliability
    M.Amagai, Texas Instruments, Japan, Y.Toyoda, Senju Metal Industry / Japan
     
  4. Comparison of Creep Behaviour of Sn-Ag-Cu Lead-free Solder System with Bismuth and Indium Addition
    C.M.L.Wu, C.M.T.Law, K.P.Tse, J.K.L. Lai, City University of Hong Kong, / Hong Kong, J. Liu, Chalmers University of Technology / Sweden
     
  5. Interfacial Reaction of Sn-based Lead-free Solder with Fe-42Ni Substrate
    C-W. Hwang, K.Suganuma, Osaka University / Japan

10:35

Break

10:50

FA2: Materials II

  1. Characteristics of Conductive Adhesive for High Conductivity in Electronics Packaging
    W.Jeong, Osaka University / Japan
     
  2. Excellent Reliability of Plastic Cored Solder Ball
    N.Okinaga, Sekisui Chemical / Japan
     
  3. Low Temperature Curable Anisotropic Conductive Film for Input Lead Bonding of Liquid Crystal Display (LCD) Modules
    T.Fujinawa, Hitachi Chemical / Japan
     
  4. Joining Silicon Carbide/Aluminum Composite
    M. Nakata, Osaka University / Japan

FB2: LTCC

  1. Self Constrained LTCC Technology Addresses Challenges in Microelectronics Packaging (Session Invite)
    P. Barnwell, F.Lautzenhiser, Heraeus Circuit Materials Division / U.S.A.
     
  2. A Study on the RuO2 System Pb-free Thick Film Resistors
    K.Akabane, Musashi Institute of Technology, C.Higuchi, Tanaka Kikinzoku Kogyo, I.Kaneko, Musashi Institute of Technology / Japan
     
  3. Comparison of LTCC Passive Components in Different Structure
    T.Hanawa, I.Urvas, Nokia-Japan / Japan
     
  4. Package Technologies for High Speed Digital Devices
    Y.Furukubo, Kyocera / Japan

12:30

Lunch Time

13:30

FA3: Flip-chip I

  1. Sub-100 Micron Pitch Flip Chip Bumping & Assembly (Session Invite)
    C.E. Bauer, TechLead / U.S.A., F.J. Wu, Chipbond Technology / Taiwan
     
  2. Bumpless Flip Chip CSP and BGA for Memory Devices
    C.W.C.Lin, S.C.L.Chiang, T.K.A. Yang, Bridge Semiconductor / Taiwan
     
  3. Flip Chip Bonding Technology Using Evaporating Type Flux
    A.Tanahashi, M. Yoshino, N.Imaizumi, Y.Otani, T.Nagasaka, Denso / Japan
     
  4. Flux-less Solder Flip Chip Bonding Technique Using Non-conductive Paste
    A.Watanabe, Toray Enginnering / Japan
     
  5. The Latest Liquid Underfill Materials for Flip-chip Applications
    H. Yoshii, Namics / Japan

FB3: Optoelectronics II

  1. A High Performance Small Form Factor Pluggable Transceiver for up to 80km Reach at 2.5Gbps
    S.Priyadarshi, I.Khalouf, K.Kamath, J.Booker, S.P.Scrak, J. Sheridan, R.Bylsma, J.P.Keska, Agere Systems / U.S.A.
     
  2. Cancel
     
  3. Optical Interconnections with Polymer Waveguide Built up on Printed Wiring Boards
    T.Nonaka, Toray Industries, T. Suzuki, Matsushita Electric Industrial, S-Y.Cho, N.M.Jokerst, Georgia Institute of Technology / U.S.A.
     
  4. Low Cost Intra-board Level Optical Interconnection Using Fluorinated Polyimide Waveguide Film
    T.Shioda, N. Takamatsu, K. Suzuki, Mitsui Chemicals / Japan
     
  5. Optical Wave Guide for Interconnect Fabricated by Molding Process
    F. Yamada, IBM Japan / Japan

15:35

Coffee Break

15:50

FA4: Flip-chip II

  1. High Density Flip Chip Assembly on Novel Printed Circuit Board
    T.Uusluoto, Tampere University of Technology, J.Maattanen, P.Palm, Elcoteq Network, A.Tuominen, Tampere University of Technology / Finland
     
  2. Pb-free Solder Bump Bonding for High Pin Count Flip-chip BGA Using Organic Substrate
    E.Hayashi, Mitsubishi Electric / Japan
  3. Plastic Flip-chip Fine Package Fabricated on Organic Substrate
    N.Masumoto, K.Tanaka, K.Mitsuka, M.Takahashi, New Japan Radio / Japan
     
  4. Some Advanced Approaches to Improve the Cost Performance of the FC-BGA Substrates
    K.Kawasaki, S.Kodama, Y.Yamaji, T.Nishio, IBM Japan / Japan
     
  5. The Use of Infrared Imaging to Define Reliability in Assembly of ACA Flip-chips Using Thin Substrates
    P.Jalonen, Satakunta Polytechnic, J.Maattanen, Elcoteq NetworkA.Ekholm, P.Reunamo, Satakunta polytechnic / Finland

FB4: High Speed/
High Frequency Package

  1. Study on Interconnection Technology for over 1Gbps On-board Signal Transmission
    K.Yamagishi, Mitsubishi Electric / Japan
     
  2. Development of Small Size Millimeter Wave Transceiver for Fixed Wireless Access
    M.Ishida, K.Gomi, N.Matsui, Toshiba / Japan
     
  3. The New Thick-film Hybrid Microwave Elements for a Novel Light Efficacy Microwave Powered Light Sources
    J.Gondek, Private Institute of Electronic Engineering, S.Kordowiak, Cracow University of Technology, P.Szatynski, TELPOD, J.Kocol, Technical School of Telecommunication / Poland
     
  4. Effect of Ground Vias on Performance of Interconnections Embedded in Multilayer PCB's
    T.Kushta, K.Narita, H.Tohya, NEC / Japan
     
  5. Replacement of Bypass Capacitor to Transmission Line for over GHz Power Supply System
    K. Saito, University of Tokyo, Y.Akiyama, Meisei University, T.Usami, University of Tokyo, K.Otsuka, Meisei University, T.Suga, University of Tokyo / Japan

17:35

 

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