|
April 14 (Thu.) |
| Room A |
Room B |
|
9:30-12:00
TA1: Interconnection
| 1. |
Effects of Bonding Parameters on Contact Pressure, Frictional Energy and Temperature Rise in Ultrasonic Wire Bonding: Numerical Analysis |
|
J.-K. Kim, D. Yong, Hong Kong University (Hong Kong) |
| 2. |
Printable Electronics Materials & Process Developments |
|
C. E. Bauer, TechLead (USA) |
| 3. |
Combined Process of Radical and RIE for Si Direct Bonding |
|
H. Itoh, H. Li, M.R. Howlader, T. Suga, The University of Tokyo (Japan) |
| 4. |
Feasibility of Surface Activated Bonding for Au/Au and Au/Sn Deposited Films |
|
H. Li, M.M.R. Howlader, T. Itoh, T. Suga,
University of Tokyo (Japan) |
| 5. |
Development of Ink Jet Wiring Technology |
|
Y. Hagio, Seiko Epson (Japan) |
| 6. |
Effect of Initial Intermetallics Uniformity on High Temperature Reliability of Gold Wire Bonding |
|
X. Zhang, T.Y. Tee, C. Passagrilli, C.M. Villa,
STMicroelectronics (Singapore) |
|
9:30-12:00
TB1: Advanced Packaging
| 1. |
Thin Silicon Chip Packaging Technologies - Wafer Dicing, Die Pickup, Die Attach and Wire Bonding |
|
S. Denda, Nagano Prefectural Institute of Technology (Japan) |
| 2. |
Expansion of Wafer Level Packaging |
|
E.J. Vardaman, TechSearch (USA) |
| 3. |
Generic Algorithm for MCM Placement |
|
C.-M. Ko, Y.-J. Huang, S.-L. Fu, I-Shou University (Taiwan) |
| 4. |
FC-BGA Package Modeling on Simultaneous Switch Noise in High Speed Digital Applications |
|
M. K. Chen, C.-C. Tai, National Cheng Kung
University, Y.-J. Huang, S.-L. Fu, I-Shou University (Taiwan) |
| 5. |
High Performance, High Power, High I/O Chip-on-Flex Packaging |
|
R. Fillion, GE Global Research Center (USA) |
| 6. |
Wafer Level Packaging Using Solder Bumps with a Plated Plastic Core |
|
R. Murayama, Sharp (Japan) |
|
|
12:00-13:00
Lunch Time |
|
13:00-15:30
TA2: System in Pakage
| 1. |
Integrated Thin Film Capacitors in Organic Laminates for Systems in Package Applications |
|
K. Kurihara, T. Shioga, J.D. Baniecki, Y. Ishizuki, M. Mizukoshi,
Fujitsu Laboratories (Japan) |
| 2. |
Unique Challenges in System in Package and Other Small Form Factor Packaging |
|
B. Prior, A. Morita, Prismark Partners LLC (USA) |
| 3. |
The Optimization of Terminal Structure for Interconnections in 3D Packaging Technology with Through-silicon Vias |
|
K. Hara, Seiko Epson (Japan) |
| 4. |
Development of Laser Diode Package Design in the Future |
|
Y. Kimura, Shinko Electric Industries (Japan) |
| 5. |
Novel 3rd Generation Integrated Module Board (IMB) Technology to Embed Active Components inside PCB Structure |
|
R. Tuominen, P. Palm, Imbera Electronics (Finland) |
| 6. |
Sillicon Through Interconnection Technology for System Integration |
|
H. Mawatari, K. Nakayama, T. Murayama, S. Tyujyo, S. Kuramochi, K. Suzuki,
Dai Nippon Printing, Y. Fukuoka, Worldwide Electronic Integrated Substrate Technology
Inc. (Japan) |
|
13:00-15:30
TB2: Lead Free
| 1. |
Role of Surface Roughness on the Oxidation and Bonding Mechanism of Sn-Ag Bonding by Surface Activated Bonding Method |
|
Y. Wang, M.R. Howlader, T. Suga, University of Tokyo (Japan) |
| 2. |
Development of Novel Functional Metal Alloy Particles for a Bonding Process |
|
M. Matsui, Y. Shimamura, N. Tanaka, N. Fujikawa, Asahi Kasei EMD (Japan) |
| 3. |
Creep Deformation Behaviors of Tin Pest Resistant Solder Alloys |
|
S.B.Kim, J. Yu, Korea Advanced Institute of Science and Technology (Korea) |
| 4. |
Rules of Law in China about Pollution and Status of Study on Lead-free Solder |
|
J. Ma, Tsinghua University (China) |
| 5. |
Study and Reliability for Low Temperature Lead-free Solder |
|
G. Chen, Y. Liu, Z. Geng, J. Ma, Tsinghua University (China) |
| 6. |
Mechanical Properties Investigation of a SnAg Solder |
|
Z. Fulong, HuaZhong University of Science and Technology (China) |
|
|
15:30-15:45
Coffee Break |
|
15:45-17:00
TA3: Optoelectronics
| 1. |
Feasibility Assessment of New Optical Modules with Simplified Manufacturing Processes Based on SMT |
|
Y. Wakazono, National Institute of Advanced Industrial Science and Technology (Japan) |
| 2. |
Multi-array Self-Written Waveguides using Photo-mask for Optical Surface Mount Technology |
|
Y. Obata, Y. Oyama, H. Ozawa, O. Mikami. T. Uchida, Tokai University (Japan) |
| 3. |
Super High Density Optical Circuits using Downsized Fiber and Multi-fiber Optical Connectors |
|
M. Ohmura, K. Ohtsuka, K. Saitoh, Sumitomo Electric Industries (Japan) |
|
15:45-17:00
TB3: Intellectual Property Strategies
| 1. |
Experiences in International Licensing |
|
J. Aloise, General Electric (USA) |
| 2. |
IP Hurdles in Transitioning to Lead-free Electronics |
|
M. Pecht, University of Maryland (USA) |
| 3. |
Managing Intellectual Property in China |
|
K. Chen, King & Wood, LLP (USA) |
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